Definition, divisibility monotonicity, and Boolean closure of ACC⁰ #
ACC⁰ (Cslib.Circuits.Boolean.ACC0) is the union of the modular constant-depth circuit classes
AC0Mod q over all fixed moduli q ≥ 2 [Bar89], Vollmer, Chapter 4,
Arora and Barak, Section 14.2: the languages over Bool decided at every input
length by polynomial-size, constant-depth nonuniform circuits over negations, unbounded fan-in
conjunctions and disjunctions, and unbounded fan-in MOD_q gates (modGate q). Since modGate 0
is disjunction and modGate 1 is the constant false, the union over all q : ℕ gives the same
class (ACC0_eq_iUnion_AC0Mod).
Repeating each input wire of a MOD_q gate k ≥ 1 times multiplies the Hamming weight by k, and
(w * k) % (q * k) = (w % q) * k, so a single MOD_{q * k} gate simulates a MOD_q gate
(AC0Mod_subset_AC0Mod_mul_right, AC0Mod_subset_AC0Mod_of_dvd). Two circuits with moduli q₁
and q₂ therefore embed into the common modulus q₁ * q₂, making ACC0 closed under complement,
intersection, and union (ACC0.compl, ACC0.inf, ACC0.sup). By Håstad's and
Razborov–Smolensky's lower bounds for parity, AC0 ⊂ AC0Mod 2 ⊆ ACC0 (AC0_ssubset_AC0Mod_two,
AC0_ssubset_ACC0) and AC0Mod p ⊂ ACC0 for every odd prime p (AC0Mod_ssubset_ACC0).
Main definitions #
Cslib.Circuits.Boolean.ACC0: the class ACC⁰ =⋃ q ≥ 2, AC0Mod q.Cslib.Circuits.Boolean.modZeroCircuit,Cslib.Circuits.Boolean.modOneCircuit,Cslib.Circuits.Boolean.modMulCircuit: gate simulations forq = 0,q = 1, andq ∣ q * k.
Main results #
Cslib.Circuits.Boolean.AC0Mod_zero,Cslib.Circuits.Boolean.AC0Mod_one:AC⁰[0] = AC⁰[1] = AC⁰.Cslib.Circuits.Boolean.AC0Mod_subset_AC0Mod_of_dvd:AC⁰[q] ⊆ AC⁰[q']whenq ∣ q'and0 < q'.Cslib.Circuits.Boolean.ACC0_eq_iUnion_AC0Mod:ACC⁰ = ⋃ q, AC⁰[q].Cslib.Circuits.Boolean.ACC0.compl,Cslib.Circuits.Boolean.ACC0.inf,Cslib.Circuits.Boolean.ACC0.sup: Boolean closure ofACC⁰.Cslib.Circuits.Boolean.ACC0_subset_TC0:ACC⁰ ⊆ TC⁰.Cslib.Circuits.Boolean.AC0_ssubset_ACC0,Cslib.Circuits.Boolean.AC0Mod_ssubset_ACC0: strictness ofAC⁰ ⊂ ACC⁰andAC⁰[p] ⊂ ACC⁰for odd primep.
References #
Degenerate moduli q = 0, 1 and divisibility monotonicity for AC0Mod #
For q = 0, modGate 0 m tests whether the Hamming weight is nonzero, which is the
unbounded disjunction .or m.
A circuit over the AC⁰ basis simulating an operation of AC⁰[0].
Instances For
AC⁰[0] = AC⁰: modulo 0, a MOD_0 gate is an unbounded OR gate.
A circuit over the AC⁰ basis simulating an operation of AC⁰[1].
Instances For
AC⁰[1] = AC⁰: modulo 1, a MOD_1 gate is the constant false.
Repeating each of the m coordinates of x k times via finProdFinEquiv multiplies the
Hamming weight by k.
A circuit over the AC⁰[q * k] basis simulating a single operation of AC⁰[q].
Instances For
Definition of ACC⁰ and closure properties #
ACC⁰: the class of languages over Bool decided at every input length by constant-depth,
polynomial-size circuits over negation, unbounded fan-in conjunction and disjunction, and
unbounded fan-in MOD_q gates for some fixed modulus q ≥ 2 [Bar89],
Vollmer, Chapter 4.
Instances For
AC⁰ ⊆ ACC⁰: every AC⁰ language belongs to AC⁰[2] ⊆ ACC⁰.
AC⁰[q] ⊆ ACC⁰ for every modulus q : ℕ (including q = 0, 1).
The modular counting language Language.ofSlices (modGate q) is in AC⁰[q].
The modular counting language Language.ofSlices (modGate q) is in ACC⁰.
Parity is in AC⁰[2].
Parity is in ACC⁰.
AC⁰ is strictly contained in AC⁰[2].
ACC⁰ ⊆ TC⁰ Vollmer, Chapter 4: every AC⁰[q] is contained in TC⁰.