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Complexity.Computability.Circuit.Boolean.CarryLookahead

Carry lookahead by parallel prefix doubling #

A carry summary (g, p) acts on a carry c by g || (p && c). Summaries are composed in significance order. Each round doubles the interval summarized by each cell; cells without a neighbour retain their summary. The initial carry is an additional cell, so width zero still has one output: that carry.

The construction uses the associative carry-transfer operation underlying parallel-prefix addition Ladner and Fischer, Section 4. OR-propagate summaries represent the same carry functions. It uses the simple doubling network, rather than their optimized linear-size prefix network. All gates, including constants and negations, count.

Main definitions #

Main results #

Native polynomial-time generation of the complete codes is proved in CarryLookahead.PolyTime.

References #

Compose the high-significance summary with the low-significance summary.

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    Consecutive carry summaries, with the most significant one first.

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      Read one summary from two equal-width rows, using the identity after the row ends.

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        The neighbour at the given distance, or the cell itself if the neighbour is absent.

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          The generate output of one prefix cell. Inactive cells use idempotence to retain their value, so the scalar circuit has exactly two gates in either branch.

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            The propagate output of one prefix cell.

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              One round of parallel carry composition, with all generate bits before all propagate bits.

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                @[simp]
                theorem Cslib.Circuits.Boolean.CarryLookahead.size_step (k distance : ℕ) :
                (step k distance).size = 3 * k

                The doubling network on an existing row of carry summaries.

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                  After t rounds every cell summarizes the next 2^t original cells, with identity padding.

                  Input bit i of the first word.

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                    Input bit i of the second word.

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                      Generate one reversed input summary; the final cell supplies the incoming carry.

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                        Propagate one reversed input summary; the incoming carry is a constant transfer.

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                          Carry summaries in descending significance, followed by the incoming carry.

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                            The carry network; w - i is the generate-wire index of the carry into bit i.

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                              One sum bit, reading the original inputs followed by the carry network.

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                                def Cslib.Circuits.Boolean.CarryLookahead.finish (w : ℕ) :
                                Circuit signature (w + w + 1 + (w + 1 + (w + 1))) (w + 1)

                                Convert carry summaries to sum bits and retain the final carry as the last output.

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                                  The arithmetic carry into bit i, used only as the specification.

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                                    theorem Cslib.Circuits.Boolean.CarryLookahead.eval_carries {w : ℕ} (u : BitString (w + w + 1)) (i : Fin (w + 1)) :
                                    (carries w).eval interpretation u ⟨w - ↑i, ⋯⟩ = inputCarry u ↑i

                                    The generate output at reversed index w-i is exactly carry i, including both endpoints.

                                    Add two unsigned words and an input carry. Inputs are the first word, the second word, then one carry bit. Outputs are the low w sum bits followed by the output carry.

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                                      theorem Cslib.Circuits.Boolean.size_carryLookahead (w : ℕ) :
                                      (carryLookahead w).size = 15 * w + 2 * (w + 1) + 3 * (w + 1) * Nat.clog 2 (w + 1)

                                      The exact number of gates in the doubling adder.

                                      Every gate has fan-in at most two, and the adder has logarithmic depth.

                                      An explicit absolute-constant logarithmic depth bound, including width zero.

                                      A coarse polynomial bound on the complete adder's number of gates.

                                      Each low output bit is the sum bit with the specified incoming carry.

                                      The last output is the final carry, also at width zero.

                                      Exact unsigned addition, including the output carry.

                                      Discard the final carry and hardwire a false incoming carry.

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                                        The modular result used to collapse a carry-save pair.

                                        An explicit absolute-constant depth bound for modular addition.

                                        Polynomial size after fixing the incoming carry and selecting the modular result.

                                        A drop-in carry-save finisher: the first word is the modular sum and the second is zero.

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                                          Only one extra constant gate is needed to clear the second carry-save word.

                                          The carry-save finisher has logarithmic depth in the word width.

                                          A polynomial gate bound for the drop-in carry-save finisher.

                                          The replacement finishing stage preserves every carry-save value modulo 2^w.

                                          Every bit of the second output word is false after the logarithmic-depth finisher.

                                          A 4-to-2 carry-save reduction followed by the new finisher computes the same modular sum. The existing carry-save circuit is unchanged.

                                          Finishing a 4-to-2 reduction adds only a constant to the logarithmic depth bound.