Simulation, hardwiring, and a universal step map #
If τ steps of U simulate one step of F on encoded states, then τ * T steps of U simulate
T steps of F (iterate_simulation). When the encoding places the input bits among constant
bits, a circuit for the power of U yields one for the power of F with at most two more gates,
the two constants of the De Morgan basis (simulation_circuit).
The universal step map executes a straight-line program, held in its state, one gate per step, and
after the last gate copies the output wires back into the input registers (Universal.step). One
round of G + 1 steps runs any circuit with at most G gates (Universal.step_round): each gate
evaluation and the simultaneous output copy/reset each count as one semantic step. Because
Universal.Description and Universal.Config carry natural-number wire indices and a
natural-number program counter (pc : ℕ), Universal.Config is an unbounded mathematical
configuration space rather than a finite Boolean state space or the native certified universal
Turing machine; the generic value carrier V uses [Inhabited V] as the default for out-of-range
wire reads and cleared work registers. The circuit reduction Universal.universal_power_circuit
is conditional: it assumes a finite bit encoding e, the start-state hardwiring equation he, and
a circuit u computing (Universal.step interpretation)^[(G + 1) * T] on start states, without
constructing a global finite state encoding or a circuit for one universal step. A group
action by a hardwired element (smul_zpow_circuit, smul_iterate_circuit, smul_inverse_circuit),
and either factor of a product map (prodMap_power_circuit, prodMap_power_circuit_left), are
handled by the same hardwiring argument.
Main definitions #
Cslib.Circuits.Boolean.Iteration.hardwired: place input bits and constants onmwires.Cslib.Circuits.Boolean.Iteration.prodMap: product of two maps on concatenated bit strings.Cslib.Circuits.Boolean.Iteration.Universal.Description: straight-line program description held in the state of the universal step map.Cslib.Circuits.Boolean.Iteration.Universal.Config: configuration of the universal step map.Cslib.Circuits.Boolean.Iteration.Universal.step: one step of the universal step map.
Main results #
Cslib.Circuits.Boolean.Iteration.simulation_circuit:C(F^[T]) ≤ C(U^[τ * T]) + 2under a hardwired simulation.Cslib.Circuits.Boolean.Iteration.prodMap_power_circuit,Cslib.Circuits.Boolean.Iteration.prodMap_power_circuit_left: factor reductions for product maps.Cslib.Circuits.Boolean.Iteration.smul_zpow_circuit,Cslib.Circuits.Boolean.Iteration.smul_iterate_circuit,Cslib.Circuits.Boolean.Iteration.smul_inverse_circuit: integer powers, iterates, and inverses of a group action by a fixed element.Cslib.Circuits.Boolean.Iteration.Universal.step_round,Cslib.Circuits.Boolean.Iteration.Universal.step_iterate,Cslib.Circuits.Boolean.Iteration.Universal.universal_power_circuit: simulation of any circuit of at mostGgates byG + 1steps of the universal map.
References #
- Adapted from lean/Proofs/UniversalMap.lean in S. Schlesinger, Square-root circuit bounds for iterated functions.
Simulation of powers #
Hardwiring constants #
The circuit consequence of a simulation: C(F^[T]) ≤ C(U^[τ * T]) + 2 when the encoding
places the input bits among constants. The circuit for the power of U need only be correct on
encoded states.
Products #
Each power of a product map is at least as hard as the same power of its second factor: fix the first factor's input and read the second factor's outputs.
Each power of a product map is at least as hard as the same power of its first factor.
Group actions by a hardwired element #
If a circuit evaluates a group action on encodings of elements and points, every integer power of the action of a fixed element, including the inverse permutation, has a circuit with at most two more gates.
Every power of the action of a fixed element, as an iterate.
The inverse of the action of a fixed element.
A universal step map #
A straight-line program held in the state: each of G entries is an operation with operand
indices, and outputs lists the wires copied back to the input registers. Index i < n names
input i, and index n + j names work register j.
The
Ggate entries, each pairing an operation with its operand wire indices.The indices of the wires copied back into the
ninput registers after a round.
Instances For
A state of the universal map: the program, the input registers, the work registers, and an
unbounded natural-number program counter. Because desc carries natural-number wire indices and
pc : ℕ, this is an infinite mathematical configuration space rather than a finite Boolean state
space.
- desc : Description σ n G
The straight-line program description held in the state.
- x : Fin n → V
The
ninput registers. - w : Fin G → V
The
Gwork registers. - pc : ℕ
The program counter.
Instances For
One semantic step: evaluate entry pc into work register pc, or, when pc ≥ G,
simultaneously copy the outputs into the input registers, clear the work registers to default,
and reset the counter.
Instances For
The index of a CSLib wire.
Instances For
The description of a circuit with at most G gates, padded by copies of pad.
Instances For
The start state on input x.
Instances For
Reading a wire by its index, from work registers that hold the gate values.
After k ≤ G steps from the start state, the first k work registers hold the values of the
corresponding gates.
One round of G + 1 steps of the universal map runs a circuit with at most G gates and
returns to a start state.
The conditional circuit consequence: assuming a bit encoding e of universal-map states that
writes the input registers of a start state directly and fixes its other bits to constants
determined by the description (he), together with a circuit u for the (G + 1) * T-th power of
Universal.step on those start states (hu), one obtains a circuit for the Tth power of c
with at most two more gates. Neither e nor a circuit for one universal step is constructed
here.