Documentation

Complexity.Computability.Circuit.Boolean.Iteration.VisitScheduleCircuits

Circuits returning complete visit schedules #

For any finite map f : BitString n → BitString n and state pair (x, y), the set of times t at which f^[t] x = y is either empty or an arithmetic progression d + k * p where d < 2 ^ n is the first hitting time and p = Function.minimalPeriod f y is the minimal return period of y (with p = 0 when y is transient, encoding the singleton {d}).

Combining navigation_circuit (which computes the reachability bit and the (n + 1)-bit first hitting time d) with minimal_period_circuit (which computes the (n + 1)-bit minimal period p of y from cycle_label_circuit and periodicPts_circuit) yields a circuit of size O(powerBudget n c.size (2 ^ n) L) returning the complete visit schedule record (visit_schedule_circuit), and O(optimizedBudget n c.size (2 ^ n)) at the balanced checkpoint spacing (visit_schedule_optimized).

Main definitions #

Main results #

References #

theorem Cslib.Circuits.Boolean.Iteration.minimal_period_circuit {n : ℕ} (c : Circuit signature n n) (L : ℕ) (hL : 0 < L) (hLN : L ≤ 2 ^ n) :
∃ (out : Circuit signature n (n + 1)), (∀ (x : Fin n → Bool), (word (out.eval interpretation x)).toNat = Function.minimalPeriod (c.eval interpretation) x) ∧ out.size ≤ 110000 * powerBudget n c.size (2 ^ n) L

Minimal return period, with zero denoting a transient state.

@[reducible, inline]

One reachability bit, an (n + 1)-bit first visit time, and an (n + 1)-bit return period.

Instances For

    The (n + 1)-bit first hitting time field of a visit-schedule record.

    Instances For

      The (n + 1)-bit return period field of a visit-schedule record.

      Instances For

        Whether time t belongs to the arithmetic progression encoded by v.

        Instances For

          An arithmetic interpretation of a schedule; no additional-input gate bound is asserted.

          Instances For
            theorem Cslib.Circuits.Boolean.Iteration.visit_schedule_circuit {n : ℕ} (c : Circuit signature n n) (L : ℕ) (hL : 0 < L) (hLN : L ≤ 2 ^ n) :
            ∃ (out : Circuit signature (n + n) (visitScheduleWidth n)), (∀ (z : BitString (n + n)) (t : ℕ), (c.eval interpretation)^[t] (inputLeft z) = inputRight z ↔ visitScheduleContains (out.eval interpretation z) t) ∧ out.size ≤ 5000000 * powerBudget n c.size (2 ^ n) L

            Visit-schedule circuit at spacing L. The returned record describes every visit time, with period zero encoding a singleton visit to a transient target.

            Square-root visit-schedule circuit. Optimizing L gives a circuit of size at most 15000000 * optimizedBudget n c.size (2 ^ n) whose output record characterizes all visit times and determines the exact visit count up to any deadline T.