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Complexity.Computability.Circuit.Boolean.ShannonConstruction

Shannon synthesis with a shared column library #

Split the inputs into a short address block and a data block. Build both tables of minterms, then every Boolean function of the address block. For each data assignment, select its column of the supplied truth table, conjoin it with that assignment's minterm, and disjoin the rows.

The construction uses native CSLib circuits and the existing balanced Boolean formulas. Its finite gate bound counts constants and negations, as well as binary gates. The companion ShannonSynthesis module chooses the address width to obtain a uniform 27 * 2 ^ n / n bound.

Main definitions #

Main results #

References #

Disjoin exactly the input coordinates selected by a bit vector.

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    @[simp]
    theorem Cslib.Circuits.Boolean.ShannonSynthesis.eval_columnFormula {n : ℕ} (pattern x : BitString n) :
    (columnFormula pattern).eval interpretation x = decide (∃ (i : Fin n), pattern i = true ∧ x i = true)

    A nonempty ambient table bounds even the empty disjunction's constant gate.

    Every pattern of a table of address minterms is computed once and shared by all data rows.

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      def Cslib.Circuits.Boolean.ShannonSynthesis.column {k d : ℕ} (f : BooleanFunction (k + d)) (y : Fin (2 ^ d)) :
      Fin (2 ^ 2 ^ k)

      The truth-table column at one data assignment, indexed as an address-value bit string.

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        One row uses the selected column and the corresponding data minterm.

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          The final disjunction of rows.

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            The two minterm tables read disjoint coordinate blocks.

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              Compute the address library while retaining the data minterms as free wires.

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                Synthesize a Boolean function from shared minterms, address columns and row selection.

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                  @[simp]

                  The selected row and address column reconstruct the original input.

                  The complete gate budget, before choosing the split.

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                    Shared minterms, shared columns and the final row disjunction account for every gate.