Word RAMs #
A word RAM is a random-access machine whose registers and memory cells hold w-bit words, and
whose every instruction costs one unit of time. The word size must accommodate the input and
its addresses; it may exceed O(log n) when input words do
Cormen et al., Section 2.2 Fredman and Willard
Hagerup. This file chooses an instruction-count model, parameterized by a basis of
word operations (Cslib.WordRAM.Basis); the standard basis Cslib.WordRAM.Basis.standard has
unit-cost multiplication, division, bitwise operations and shifts. It does not establish a bit-cost
simulation.
The existing Cslib.RAM, inspired by Cook and Reckhow Cook and Reckhow, has
unbounded natural-number registers and supports both unit and logarithmic cost measures.
Cslib.WordRAM instead supplies bounded, faulting operational semantics, a finite named register
file with indirect memory, and a different input and halting convention. Changing a cost measure
alone does not change these operational choices. No simulation between these models or Turing
machines is proved here.
This file defines the machine and its runs. Cslib.WordRAM.DecidableInTime allows width-indexed
code of uniformly bounded length, width-dependent encodings and time bounds, and arbitrary
admissible input/width pairs. Cslib.WordRAM.UniformDecidableInTime uses one fixed program.
Structured programs
(Cslib.WordRAM.Code) compile
to the flat programs of this file with the same instruction counts.
The model #
- A program (
Cslib.WordRAM.Program B r) over a basisBis a list of instructions over a finite register fileFin r; besides the registers there is a memory indexed by natural numbers. - Registers and memory cells hold natural numbers below
2 ^ w(Cslib.WordRAM.Fits). - The data instructions (
Cslib.WordRAM.Op) load a constant, copy a register, apply an operation of the basis to registers, and read or write the memory cell whose address is held in a register. The standard basis has the arithmetic, bitwise and shift operations (Cslib.WordRAM.BinOp, applied byCslib.WordRAM.Op.bin) and reads the word sizew(Cslib.WordRAM.Op.width); the exact basis (Cslib.WordRAM.Basis.exact) has the same operations, with subtraction below zero and division by zero undefined. The control instructions jump, branch on an equality or unsigned comparison of two registers, and halt with the contents of a register as output. - A run starts at instruction
0with all registers0, the input length at address0and the input words at addresses1, …, n(Cslib.WordRAM.State.init); all other cells hold0. Installing this initial input and extracting the halting output are uncharged; executing the finalhaltcosts one instruction. - On a run from an input whose length and words fit a word (
Cslib.WordRAM.InputFits), an instruction that would write a number of more thanwbits into a register faults, and so do an operation whose value is undefined and running off the end of the program. A fault is not a result: only runs that halt count. Registers and memory hold words throughout such a run (Cslib.WordRAM.Runs.bounded_init), so every address is a word and the memory has2 ^ wusable cells.
Design notes #
The definitions are adapted from the Lean formalization accompanying MIT–ULB CompGeom Group. The modelling choices are these.
- Overflow faults instead of wrapping around modulo
2 ^ w. This formalizes the standard assumption that every value an algorithm computes fits a word Cormen et al., Section 2.2: a run that succeeds never relies on wrapping. Hence a successful run of a program that does not read the word size never depends on it: such a run succeeds identically at every larger word size (Cslib.WordRAM.Executes.mono_width). Algorithms that use arithmetic modulo2 ^ wHagerup must reduce explicitly, for instance with the word size and half-word arithmetic; this is not formalized here. - Words are unsigned Hagerup. In the standard basis subtraction is truncated, and
division and remainder by zero follow Lean's conventions
x / 0 = 0andx % 0 = x. In the exact basis these values are undefined, so the operation faults. These are part of this machine's semantics; transfer to a model with other conventions requires a separate simulation. - The operations form a parameter, as the gates of a circuit do: word-RAM models differ in their instruction sets Hagerup. The standard basis has addition, subtraction, multiplication, bitwise operations and shifts as in Hagerup's multiplication RAM, together with division, remainder and an operation reading the word size, which word-RAM algorithms may use Fredman and Willard. Everything else about the machine is the same for every basis.
- Only constants and operations check that the number they write fits a word. Copies,
loads and stores move words already held by the machine, and every address held in a register
is a word, so on a run from an input that fits such checks could never fail
(
Cslib.WordRAM.Runs.bounded_init); omitting them spares every program proof their side conditions. - Memory starts zeroed beyond the input, so a program may use any cell before writing it.
- The program counter is not required to fit a word. Each execution uses a finite program; the complexity predicates additionally bound code length independently of word size.
- Data instructions have one semantics,
Cslib.WordRAM.Op.eval, shared by flat and structured programs; runs are counted with cslib'sRelation.RelatesInSteps.
Compared with the source formalization, words are unsigned rather than two's-complement integers;
the operations form a basis, whose standard instance adds bitwise operations, shifts and the word
size to the source's arithmetic (Cslib.WordRAM.Basis.arithmetic); copies, loads,
addresses and the halting output are not checked against the word size; the program counter is
unbounded; the time classes of Cslib.WordRAM.LinearTime measure the word size by the number
of binary digits of the size rather than by log₂ (size + 2) + 2; and an operation may be
undefined, which faults. In particular, the exact basis faults on subtraction below zero and on
division and remainder by zero. The source does not reject these cases as such: its signed
subtraction may give a negative word, its division and remainder follow Lean's integer conventions
x / 0 = 0 and x % 0 = x, and only its usual check that the result fits a signed word applies.
The current classes allow width-indexed code; the Uniform variants retain the fixed-program
convention.
Main definitions #
Cslib.WordRAM.Fits: a number fits aw-bit word.Cslib.WordRAM.Cond,Cslib.WordRAM.Op,Cslib.WordRAM.Instr,Cslib.WordRAM.Program: conditions, data instructions, instructions and programs over a basis.Cslib.WordRAM.Op.bin,Cslib.WordRAM.Op.width: the data instructions of the standard basis;Cslib.WordRAM.Op.exactBin,Cslib.WordRAM.Op.exactWidth: those of the exact basis.Cslib.WordRAM.Data,Cslib.WordRAM.State: registers with memory, and with a program counter.Cslib.WordRAM.Op.eval: the effect of a data instruction,noneon a fault.Cslib.WordRAM.step: one step of a program, which continues, halts with an output, or faults.Cslib.WordRAM.Runs,Cslib.WordRAM.Executes: runs of a given number of steps, and runs that halt with a given output after a given number of instructions, thehaltincluded.Cslib.WordRAM.State.init,Cslib.WordRAM.InputFits: the initial state on an input, and inputs whose length and words fit a word.Cslib.WordRAM.run: a computable interpreter with a step budget.
Main results #
Cslib.WordRAM.executes_iff_exists_run_eq: the interpreter computes exactly the halting runs.Cslib.WordRAM.Executes.unique: output and instruction count are determined by the program, the word size and the state.Cslib.WordRAM.Runs.bounded_init: from an input that fits, every reachable register and memory cell holds aw-bit word.Cslib.WordRAM.Executes.mono_width: a program that does not read the word size halts in the same way at every larger word size.
References #
- S. A. Cook and R. A. Reckhow, Time bounded random access machines
- T. H. Cormen, C. E. Leiserson, R. L. Rivest and C. Stein, Introduction to Algorithms
- M. L. Fredman and D. E. Willard, Surpassing the information theoretic bound with fusion trees
- T. Hagerup, Sorting and searching on the word RAM
- MIT–ULB CompGeom Group, Undecidability of tiling with a tromino
Words #
A number fits a w-bit word if it is below 2 ^ w.
Instances For
The word size fits a word, so that a program may read it.
Instructions #
The data instructions over the basis B. Registers are named in the instruction; memory is
addressed through the contents of a register.
- const {B : Basis} {r : ℕ} (d : Fin r) (v : ℕ) : Op B r
const d vsets registerdto the constantv. - copy {B : Basis} {r : ℕ} (d s : Fin r) : Op B r
copy d ssets registerdto the contents of registers. - alu {B : Basis} {r : ℕ} (f : B.Op) (d : Fin r) (args : Fin (B.Arity f) → Fin r) : Op B r
alu f d argssets registerdto the operationfof the basis applied to the registersargs. - load {B : Basis} {r : ℕ} (d a : Fin r) : Op B r
load d asets registerdto the memory cell whose address is in registera. - store {B : Basis} {r : ℕ} (a s : Fin r) : Op B r
store a ssets the memory cell whose address is in registerato registers.
Instances For
bin f d i j sets register d to the standard binary operation f applied to registers i
and j.
Instances For
width d sets register d to the word size.
Instances For
exactBin f d i j sets register d to the exact value of the binary operation f applied
to registers i and j.
Instances For
exactWidth d sets register d to the word size, over the exact basis.
Instances For
Instructions over the basis B: data instructions, jumps, conditional branches and halting.
Jump and branch targets are instruction indices.
- op {B : Basis} {r : ℕ} (o : Op B r) : Instr B r
Execute a data instruction and proceed to the next instruction.
- jump {B : Basis} {r : ℕ} (t : ℕ) : Instr B r
Proceed to instruction
t. - branch {B : Basis} {r : ℕ} (c : Cond r) (t : ℕ) : Instr B r
Proceed to instruction
tifcholds, and to the next instruction otherwise. - halt {B : Basis} {r : ℕ} (i : Fin r) : Instr B r
Halt with the contents of register
ias output.
Instances For
A program over the basis B and r registers is a list of instructions, indexed by the
program counter.
Instances For
Data and states #
Semantics of instructions #
The effect of a data instruction at word size w, or none if it faults. Only constants
and operations can produce a number that does not fit a word, and they fault when they do; an
operation also faults when its value is undefined.
Copying, loading and storing need no check: throughout a run from an input that fits, registers
and memory hold words (Cslib.WordRAM.Runs.bounded_init), so every address held in a register is
a word too.
Instances For
Runs #
Inputs #
Word bounds #
The machine holds only w-bit words: from an input that fits, every register and memory cell of
every reachable state does.
A step preserves word bounds.
A run preserves word bounds.
Every state reachable from an input that fits holds only w-bit words.
Larger word sizes #
Overflow faults, so a program that does not read the word size cannot tell word sizes apart on a run that succeeds: the same run succeeds at every larger word size.
The data instruction reads the word size: it applies an operation that the basis marks with
Basis.ReadsWidth, such as Op.width in the standard basis.
Instances For
Word-size monotonicity. A program that does not read the word size halts in the same way at every larger word size.