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Complexity.Computability.WordRAM.Multiword.Circuit

Arithmetic instruction graphs for multiword RAM execution #

Virtual registers are eighteen-digit entries of Multiword.Bank. A binary node names only standard RAM operations. Its execution is implemented by the checked digit routines rather than by enlarging the RAM's operation basis or physical width.

Main definitions #

References #

A node in a fixed register graph. Constants may depend on the physical width at code construction time; the two arguments of a binary node are run-time register values.

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      Natural-number specification of a virtual instruction.

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        Sources are earlier nodes in the instruction graph.

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          Bounds needed by the concrete compiler. Multiplication, subtraction and Boolean operations use digit routines. A right-shift count is reconstructed as a physical scalar; the remaining operations use fitting physical operands and a fitting physical result.

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