Most-significant-bit arithmetic for fusion trees #
The arithmetic expressions use multiplication, subtraction, Boolean operations and shifts. Their correctness is distinct from execution on a bounded-word RAM: the intermediate products need multiple physical words. The construction follows pages 7–8 of the MIT 6.851 Spring 2021 lecture 12 notes, https://courses.csail.mit.edu/6.851/spring21/lectures/L12.pdf.
Main definitions #
ones,powers,guards,powerCount: packed all-ones multiplier, packed power ladder, guard bits and comparison count for parallel power-of-two comparisons.powerFlags: parallel comparisons against consecutive powers of two.smallMSB: count the successful comparisons and subtract one.clusterMask,clusterMarkers,compressionShift,compressionMultiplier: cluster mask, nonzero-cluster markers, shift and multiplier for compressing cluster markers.clusterSummary: compress the nonzero-cluster markers by multiplication.msb,clusterSize,widthMSB: two-stage MSB expression, cluster width⌈√w⌉and width-wMSB.powerStageValues,clusterStageValues: virtual-register intermediate values for the power-of-two and cluster stages.
Main results #
smallMSB_eq_log2: correctness without a most-significant-bit primitive.clusterMarkers_guard: exact nonzero detection, without intercluster borrowing.widthMSB_eq_log2: full arithmetic correctness, including zero and nonsquare widths.widthMSB_virtual_bounds: all recorded arithmetic intermediates fit in6wbits.
References #
One at the low bit of each of s fields of width s + 1.
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Field i contains the comparison threshold 2 ^ i.
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A guard bit at the top of every field.
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Simultaneously compare z with every 2 ^ i, for i < s.
The output has a zero-or-one digit in every radix-2^(s+1) field.
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Multiplication counts the successful power-of-two comparisons.
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Most-significant set bit for a positive input of at most s bits.
The expression contains no logarithm or bit-search operation; constants depend only on s.
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The most significant bit of each of s clusters, each s bits wide.
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Set a cluster's marker exactly when the cluster is nonempty. The original high bits are separated before subtraction, preventing borrows between clusters.
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Shifts moving diagonal marker products to positions s² + i.
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Precomputed multiplier for the cluster markers.
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One bit per nonempty cluster, computed by multiply, shift, and mask. The final mask removes the off-diagonal multiplication terms.
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The compressed summary fits in s bits, including for an empty input.
Two parallel power-comparison/count stages, with extraction of the selected cluster.
The value for zero is explicitly zero. All constants depend only on s.
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Ceiling of the square root, with zero width assigned zero clusters. This is a width-dependent preprocessing constant, not a run-time square-root instruction.
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The cluster capacity covers nonsquare widths and uses at most twice the input width.
Width-specific MSB arithmetic, including zero and nonsquare widths.
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Every arithmetic value in one powers-of-two comparison/count stage. This records intermediates before masking or shifting, so oversized products cannot be hidden.
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Every arithmetic value in marking and compressing the clusters, including the full product before shifting and masking.
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Every value in both comparison/count stages and the marking/compression stage fits
in 6w virtual bits. These bounds support a future multiword implementation; they do not
claim execution with a 6w-bit physical word.