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Complexity.Computability.Circuit.Boolean.ShannonSynthesis

Finite Shannon synthesis #

Choosing ⌊log₂ n⌋ - 1 address bits in the shared-column construction yields a circuit with at most 27 * 2 ^ n / n gates for every Boolean function on n ≥ 16 inputs. The natural-number division is applied after multiplying by 27. All gates, including constants and negations, are counted.

The synthesizer is a computable function of a supplied truth table. This module bounds the resulting circuit's size; it does not certify the synthesizer's running time.

Main definitions #

Main results #

References #

Width of the address block in finite Shannon synthesis.

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    Width of the remaining data block.

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      @[simp]

      The address width and data width sum to the total input width n.

      The chosen split bounds the complete gate ledger, with natural division after scaling.

      Build a circuit from a truth table, using the chosen address/data split.

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        @[simp]

        synthesize f evaluates to f x at its single output wire.

        The synthesized circuit computes the supplied Boolean function.

        Every gate is counted, including constants and negations.

        A finite Shannon bound on the total number of gates, valid at every width at least 16.