Documentation

Complexity.Computability.Circuit.Frontier.Compiler.CNF

Exact-multiplicity CSP and CNF compilation of circuits via the frontier compiler #

Compiles a circuit c : Circuit σ n m over an arbitrary Boolean signature σ into a Boolean constraint satisfaction instance Compiler.toCSP c : CSP (CircuitRel σ m) ℕ on its reachable wires (Compiler.Signal c), and from there via Cslib.Logic.PL.CSP.toCNF into a CNF formula Compiler.toCNF c I acc accompanied by an explicit unread-input / unconstrained-wire shift Compiler.freeShift c I acc, such that:

  1. Bounded scope and clause width: when c.FanInAtMost k, every constraint of toCSP c (and therefore every clause of toCNF c I acc) has width at most k + 1.
  2. Gate-size variable bound: (toCNF c I acc).numVars ≤ k * c.size + m (independent of the ambient input count n), bounded through Compiler.card_signal_le on Compiler.Signal c.
  3. Exact multiplicity (acceptCount_eq_two_pow_freeShift_mul_modelCount): c.acceptCount I acc = 2 ^ freeShift c I acc * (toCNF c I acc).modelCount, proved through the frontier constraint network Compiler.network c I _, its exactness and trace-uniqueness theorems (Compiler.satisfies_iff, Compiler.eq_trace, Compiler.accepted_network), and read-dependence (Network.dependsOn_read).

Source relation and library extensions #

Appendix C.1 of [OAI26c] (p. 51) introduces one variable per gate (n + s variables total) for single-output De Morgan (AND/OR/NOT) circuits to preserve satisfiability in 3-CNF. Generalizing to arbitrary signatures σ and multi-output acceptance predicates acc, pruning to reachable wires (Signal c) so the variable bound k * c.size + m depends on gate count rather than ambient input count n, and tracking exact multiplicity via 2 ^ freeShift for #Circuit-SAT are original extensions built on Cslib.Circuits.Frontier.Compiler and Cslib.Logic.PL.CSP.ToCNF.

Main definitions #

Main results #

References #

Uniqueness bijection on Compiler.network #

noncomputable def Cslib.Circuits.Frontier.Compiler.satisfiedPairsEquiv {σ : Signature} {n m : ℕ} {U : Type u_1} (c : Circuit σ n m) (I : Interpretation σ U) (Acc : Fin m → Set U) :
{ p : (Fin n → U) × (Edge c → U) // (network c I Acc).Satisfies p.1 p.2 } ≃ ↑(network c I Acc).accepted

By Compiler.satisfies_iff and Compiler.eq_trace, pairs (x, α) satisfying Compiler.network c I Acc correspond bijectively to accepted inputs x ∈ (network c I Acc).accepted with zero multiplicity inflation.

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    Constructive CSP and CNF compilation along reachable wires #

    @[reducible, inline]

    Relation alphabet for frontier CSP compilation of an m-output circuit over σ:

    • .inl op: a gate-evaluation relation on outWire :: argWires;
    • .inr o: the unary acceptance predicate at output o : Fin m.
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      Boolean relation semantics for CircuitRel σ m:

      • .inl op accepts outBit :: inBits iff inBits.length = σ.Arity op and outBit = I op (fun a => inBits.getD a.val false);
      • .inr o accepts [b] iff acc o b = true.
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        One backward reachability step on a gate (g, j): if gate wire n + j is already marked reachable, prepend its argument wires g.2.

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          Backward pass computing the list of reachable wire numbers from a serialized circuit (gates, outputs) on n inputs.

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            Number of reachable internal gates in a serialized circuit on n inputs.

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              Serialized circuit-to-CSP compiler emitting one gate constraint (Sum.inl g.1, (n + j) :: g.2) for each reachable gate (g, j) followed by one unary output constraint (Sum.inr o, [code.2.getD o.val 0]) for each o : Fin m.

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                Reachable-wire Boolean CSP compiled from c : Circuit σ n m.

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                  Serialized circuit-to-CNF compiler obtained by applying CSP.toCNF (circuitSem I acc) to toCSPCode m n code.

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                    def Cslib.Circuits.Frontier.Compiler.freeShiftCode {σ : Signature} (I : Interpretation σ Bool) {m : ℕ} (acc : Fin m → Bool → Bool) (n : ℕ) (code : List (σ.Op × List ℕ) × List ℕ) :

                    Exact binary-exponent shift accounting for unread inputs and reachable wires that do not appear syntactically in toCNFCode (e.g. unconstrained outputs).

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                      def Cslib.Circuits.Frontier.Compiler.toCNF {σ : Signature} {n m : ℕ} (c : Circuit σ n m) (I : Interpretation σ Bool) (acc : Fin m → Bool → Bool) :

                      Exact-multiplicity CNF formula compiled from c : Circuit σ n m along its reachable wires.

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                        def Cslib.Circuits.Frontier.Compiler.freeShift {σ : Signature} {n m : ℕ} (c : Circuit σ n m) (I : Interpretation σ Bool) (acc : Fin m → Bool → Bool) :

                        Unread-input / unconstrained-wire exponent shift accompanying toCNF c I acc.

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                          Specialization of toCNF to 1-output #Circuit-SAT (accepting true at output 0).

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                            Specialization of freeShift to 1-output #Circuit-SAT.

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                              Local constraint semantics #

                              Equivalence of reachWiresCode and Compiler.Reach #

                              Structural bounds on toCSP and toCNF #

                              theorem Cslib.Circuits.Frontier.Compiler.length_scope_le_of_mem_toCSP {σ : Signature} {n m : ℕ} {c : Circuit σ n m} {k : ℕ} (hfan : c.FanInAtMost k) {con : Logic.PL.Constraint (CircuitRel σ m) ℕ} (hcon : con ∈ toCSP c) :
                              con.2.length ≤ k + 1

                              Every constraint in toCSP c has scope length at most k + 1 when c.FanInAtMost k.

                              theorem Cslib.Circuits.Frontier.Compiler.length_le_of_mem_toCNF {σ : Signature} {n m : ℕ} {c : Circuit σ n m} (I : Interpretation σ Bool) (acc : Fin m → Bool → Bool) {k : ℕ} (hfan : c.FanInAtMost k) {cl : Logic.PL.Clause ℕ} (hcl : cl ∈ toCNF c I acc) :

                              Every clause of toCNF c I acc has length at most k + 1 when c.FanInAtMost k.

                              Every variable occurring in toCSP c belongs to (reachWiresCode n c.code).toFinset.

                              theorem Cslib.Circuits.Frontier.Compiler.vars_toCNF_subset {σ : Signature} {n m : ℕ} (c : Circuit σ n m) (I : Interpretation σ Bool) (acc : Fin m → Bool → Bool) :

                              Every variable occurring in toCNF c I acc belongs to (reachWiresCode n c.code).toFinset.

                              (reachWiresCode n c.code).toFinset has cardinality Nat.card (Signal c).

                              theorem Cslib.Circuits.Frontier.Compiler.numVars_toCNF_le {σ : Signature} {n m : ℕ} {c : Circuit σ n m} (I : Interpretation σ Bool) (acc : Fin m → Bool → Bool) {k : ℕ} (hfan : c.FanInAtMost k) :
                              (toCNF c I acc).numVars ≤ k * c.size + m

                              When c.FanInAtMost k, toCNF c I acc uses at most k * c.size + m distinct variables.

                              theorem Cslib.Circuits.Frontier.Compiler.numVars_toCNF_le_add_size {σ : Signature} {n m : ℕ} (c : Circuit σ n m) (I : Interpretation σ Bool) (acc : Fin m → Bool → Bool) :
                              (toCNF c I acc).numVars ≤ n + c.size

                              toCNF c I acc uses at most n + c.size distinct variables (all wire numbers lie below n + c.size).

                              Exact counting through Compiler.network #

                              Exact counting via Compiler.network. For every circuit c : Circuit σ n m, interpretation I, and output predicate acc, the number of accepted inputs equals 2 ^ freeShift c I acc * (toCNF c I acc).modelCount.

                              theorem Cslib.Circuits.Frontier.Compiler.satisfiable_toCNF_iff {σ : Signature} {n m : ℕ} (c : Circuit σ n m) (I : Interpretation σ Bool) (acc : Fin m → Bool → Bool) :
                              (toCNF c I acc).Satisfiable ↔ ∃ (x : Fin n → Bool), ∀ (o : Fin m), acc o (c.eval I x o) = true

                              toCNF c I acc is satisfiable iff c has an input accepted by acc.

                              toSatCNF c I is satisfiable iff ⟨n, c⟩ ∈ SignatureCircuitSAT I.