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Complexity.Computability.WordRAM.Signed.State

Representing signed RAM states by unsigned words #

Source registers occupy target registers nine and above. The arithmetic workspace is disjoint from them. Source memory addresses are unchanged; each stored integer is encoded in one word.

Main definitions #

Main results #

References #

This representation is an original implementation choice for the existing signed RAM.

Source registers follow the nine unsigned arithmetic registers.

Instances For

    Distinct source registers have distinct target registers.

    theorem Cslib.GenericRAM.Signed.ToWordRAM.bank_ne_scratch {r : ℕ} (i : Fin r) {j : Fin (r + 9)} (hj : ↑j < 9) :
    bank i ≠ j

    Source register cells are disjoint from the arithmetic workspace.

    The source registers fit their signed width; target registers and memory encode the source data. Scratch values are unconstrained at instruction boundaries.

    Instances For
      theorem Cslib.GenericRAM.Signed.ToWordRAM.Represents.scratch {r w : ℕ} {x : Data model r} {y : WordRAM.Data (r + 9)} (h : Represents w x y) {i : Fin (r + 9)} (hi : ↑i < 9) (v : ℕ) :
      Represents w x (y.set i v)

      Arithmetic scratch writes do not change the represented signed state.

      Framed arithmetic preserves all represented source registers and memory.

      theorem Cslib.GenericRAM.Signed.ToWordRAM.Represents.set {r w : ℕ} {x : Data model r} {y : WordRAM.Data (r + 9)} (h : Represents w x y) (i : Fin r) {v : ℤ} (hv : Fits w v) :

      A fitting signed register update is represented by a single bank update.

      theorem Cslib.GenericRAM.Signed.ToWordRAM.Represents.write {r w : ℕ} {x : Data model r} {y : WordRAM.Data (r + 9)} (h : Represents w x y) (a : ℕ) (v : ℤ) :

      A signed memory update uses the same address and the encoded value.