Uniform sequential realization of memory clients #
The continuation has one realization for the environment paired with its runtime answer. Its source registers append the first computation's answer slots to the original inputs. The predecessor's auxiliary words are dead after its answer is available, so the continuation reuses them. Its bank already contains the final output slots, so no result copy is needed. The retained witness gives the concrete scratch, factor and emitter with the existing Spec.
Main definitions #
bindSharedLeft,bindSharedRight: the shared-bank layout for retained binds.Realizes.Witness.bind: sequential composition retaining data and sharing dead scratch.
Main results #
bindShared_layout: both stages' register premises from those of the composite bank.bindShared_appendWords: the continuation's source bank after the predecessor's frame and output.bind_cost_le: additive cost bound under the maximum of two exchange factors.Realizes.bind: sequential realization with additive memory and local-work charges.Realizes.Witness.bind_execWithin: tighter native budgets on the same supplied emitter.
Tighten the native budgets of the supplied component runs without changing code, domain
or semantic postconditions. The continuation receives the predecessor's derived encoded answer,
exact intermediate memory, boundedness, safety and valid history. Both stages receive their
derived layout premises. Only execution bounds are
supplied by the callbacks; the complete frame/input/memory proof is shared with Witness.bind.
The resulting bound is additive on the same retained sequential emitter.
Retain one uniform sequential emitter while reusing the predecessor's dead auxiliary words. Only its runtime answer remains live in a separate tail bank. The continuation's result slots are already the composite result slots, so no copies or extra charge are introduced.
Instances For
One uniform continuation emitter consumes the original environment and the first runtime answer. Its domain and work charge are evaluated at the deterministic intermediate state. All emitted code, register banks and the exchange constant precede runtime answers.
Frontier-bounded sequential composition of two Memory.Prog realizations.
Sequencing with the bind's control unit absorbed (work = 0).
Sequencing with closed-form reply and next memory (work = 0).