Documentation

Complexity.Computability.Circuit.Boolean.CarryLookahead.PolyTime

Native generation of carry-lookahead circuit codes #

All constructors return the actual binary gate-and-output encoding. Widths and loop counts are unary; distances and wire references are binary. The prefix loop carries its already generated code and appends one fixed-width round at a time. Bounds on the complete intermediate encoding justify the loop, including tags, delimiters and output references.

Main definitions #

Main results #

The total raw neighbour rule used by the doubling layer.

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    The generate cell's full code, also defined on out-of-range raw coordinates.

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      The propagate cell's full code.

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        Bundle the fixed-size generate and propagate blocks of one doubling round.

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          theorem Cslib.Circuits.Boolean.CarryLookahead.stepCode_eq (k distance : ℕ) :
          stepCode k distance = (step k distance).code

          The raw round is exactly the typed circuit's code, with no malformed-input assumption.

          A doubling round is generated uniformly from a unary width and a binary distance.

          Generate any number of doubling rounds from unary width and round count. The native loop keeps the accumulated code and unary round counter, with polynomial intermediate encoded length.

          The generate gate of an initial cell, expressed as raw circuit data.

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            The propagate gate of an initial cell, expressed as raw circuit data.

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              The whole initial row, with one gate per generate or propagate cell.

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                The sum cell's raw code, using the original inputs and the reversed carry row.

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                  The full final-output code, including the carry-out reference.

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                    One native polynomial-time algorithm generates the entire logarithmic-depth adder code from unary width. Every binary gate reference, output reference and framing bit is charged.

                    The modular adder is generated by the same uniform native algorithm plus free output wiring and one hardwired carry gate.

                    Generate the complete carry-save finishing code, including its repeated zero output wires.