Word RAMs as generic RAMs #
Every word-RAM basis determines a GenericRAM.Model. Values, addresses, constants and the
configuration are natural numbers, with the configuration interpreted as word width. Operations
use the original basis; equality and unsigned comparison are the tests. Only constants and
operation results check word fit, exactly as in WordRAM.Defs; existing values and control labels
remain unchecked. Address extraction is the identity, including on arbitrary initial states.
The adapter preserves each step, including faults, and every fuel-bounded result and exact instruction count. It does not impose new validity assumptions on existing WordRAM states.
Main definitions #
Basis.genericModel: the generic model associated to a word-RAM operation basis.Data.toGeneric,State.toGeneric,Program.toGeneric: the exact representation adapter.
Main results #
step_toGeneric: one step has the identical continuation, halt or fault.run_toGeneric,executes_toGeneric_iff: output and exact instruction counts agree.
References #
Natural word values and addresses, with exactly the existing word-RAM checking policy.
The two test symbols are false for equality and true for unsigned comparison.
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Identical registers and memory in the generic representation.
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Identical control label, registers and memory in the generic representation.
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Translate an equality or comparison test.
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Translate a data instruction without changing its registers or operation.
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Translate an instruction without changing its control labels.
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Instruction-for-instruction translation to the generic core.
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Translation preserves the number of instructions.
The original input convention is an explicit generic initialization, with no charged work.
Translate a step outcome without changing its meaning.