Documentation

Complexity.Computability.WordRAM.Multiword.Bank

Fixed banks of multiword registers #

Each bank entry contains eighteen little-endian half-word digits. The first forty-four physical registers are reserved for arithmetic and transfer workspaces. Register indices are part of the code, so even width two requires no address large enough to name the bank.

Main definitions #

Main results #

References #

Number of non-workspace registers in a bank with n entries.

Instances For

    The fixed eighteen-digit register list for entry j.

    Instances For
      theorem Cslib.WordRAM.Multiword.Bank.mem_regs {n : ℕ} {j : Fin n} {i : Fin (capacity n + 4)} (hi : i ∈ regs j) :
      44 + 18 * ↑j ≤ ↑i ∧ ↑i < 44 + 18 * ↑j + 18
      theorem Cslib.WordRAM.Multiword.Bank.disjoint_regs {n : ℕ} {j k : Fin n} (hjk : j ≠ k) :
      def Cslib.WordRAM.Multiword.Bank.Encodes {n : ℕ} (w : ℕ) (x : Data (capacity n + 4)) (v : Fin n → ℕ) :

      Bounded half-word digits and the values of all virtual registers.

      Instances For
        theorem Cslib.WordRAM.Multiword.Bank.encodes_update {n w : ℕ} {x y : Data (capacity n + 4)} {v : Fin n → ℕ} (hx : Encodes w x v) (d : Fin n) (z : ℕ) (hy : Bounded (radix w) y (regs d)) (hz : value (radix w) y (regs d) = z) (hp : ∀ (i : Fin (capacity n + 4)), 44 ≤ ↑i → i ∉ regs d → y.regs i = x.regs i) :

        Updating one entry preserves the encodings of every other entry. Workspace registers below forty-four may change freely.

        theorem Cslib.WordRAM.Multiword.Bank.six_word_capacity {w : ℕ} (hw : 2 ≤ w) :
        2 ^ (6 * w) ≤ radix w ^ 18

        Every six-word value fits in one bank entry, including odd physical widths.