Checked constant-instruction most-significant-bit execution #
The 44 virtual slots spell out the arithmetic in MSB.msb. Slot zero holds the input;
the other 43 slots are constants or binary standard RAM operations. The checked compiler
expands them into standard instructions at the original physical word width, using eighteen
half-word digits per virtual value. Every virtual intermediate fits in 6w bits.
Main definitions #
MSB.Program.values: the mathematical value at each virtual slot.MSB.Program.ops: the source operations, with an unused placeholder at slot zero.MSB.Program.scalarCode: composable register entry with charged workspace initialization.MSB.Program.program: a halting program for the ordinary singleton input encoding.
Main results #
MSB.Program.eval_ops: each executed operation computes its specified value.MSB.Program.ops_earlier: each operation reads only earlier slots.MSB.Program.values_output: the final slot contains the highest set-bit index.MSB.Program.exec_scalarCode: arbitrary-memory register entry for widths at least three.MSB.Program.executes_program: halting execution within 200001 instructions forw ≥ 2.
Code depends on the width through preprocessing constants, with uniformly bounded size and 836 physical registers. The scalar entry uses registers four and six for input and output; the remainder of its register workspace may change. Memory is preserved exactly. There is no uniform fixed-code preprocessing theorem or claim that the constants are generated at run time.
References #
The values of the 44 virtual slots. The two comparison/count stages use the
named pure expressions from MSB, so their intermediate bounds remain reusable.
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Source operations in destination order. Slot zero is an unused placeholder: execution starts at slot one with the input already present in slot zero.
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Slot zero is the supplied input.
Every executed source node agrees with its pure arithmetic expression.
All source operands precede their destination, including the unused constant placeholder at zero. Hence each executed destination is fresh.
With the width-dependent cluster size, the final source value is the highest set-bit index. This is a source-graph result, without a RAM execution assertion.
Each virtual value occurs in an audited stage list, apart from the unit constant, the selected-cluster offset, the unmasked selected input, and the final output.
At widths at least three, the precomputed cluster size is strictly smaller than the physical width.
The two guarded comparison inputs and their sums fit in physical words.
Every shift count used by the source graph fits in one physical word.
The final addition has fitting operands and result.
Every executed node satisfies the concrete multiword compiler's admissibility contract. Only the additions and shift counts require physical-word bounds.
Physical register containing the final scalar answer.
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A physical zero used for the input-zero branch.
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The forty-three arithmetic nodes, followed by checked scalar reconstruction.
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Execution of the actual expanded graph on a positive input. Every virtual operation is
discharged by Circuit.exec_emit, which uses the checked single-word routines.
Width two needs only division by two: its possible indices are zero and one.
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The width-selected checked program. For larger widths the zero case returns zero and positive inputs execute the full graph. All constants and conversions are charged.
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The complete standard-basis program executes at the original physical width, from the ordinary singleton RAM input, within a constant instruction count independent of width. No preloaded wide constants, digit encodings, or MSB oracle are assumptions.
Zero dispatch and positive arithmetic after the input bank entry has been established.
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Register entry point for composition. The caller supplies its fitting input in physical register four. All 792 bank digits are cleared, the input is split in 44 instructions, and the same checked graph returns its answer in physical register six. No memory is read.
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Composable scalar-register execution. The entire incoming register file and memory may
be arbitrary. Only the input register must fit. The routine preserves memory exactly and
returns Nat.log2 in physical register six within 200000 instructions, including clearing.
Registers inside this 836-register workspace may change; renamed embeddings frame all others.
The complete flat standard-basis program, with its final halt charged separately.
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Actual halting execution returning the most-significant-set-bit index, with zero returning zero. The register count and the time bound are independent of physical width.